Format |
Syntax: |
Operation: |
Operands: |
Architecture revision |
Opcode | ||||||||||||||||
1 |
stc.d CP#, Rp[disp], CRs |
*(Rp + (ZE(disp8) << 2)) = CP#(CRd+1:CRd); |
# ∈ {0, 1, …, 7} |
Rev1+ |
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2 |
stc.d CP#, Rp++, CRs |
*(Rp) = CP#(CRd+1:CRd); Rp = Rp+8; |
# ∈ {0, 1, …, 7} |
Rev1+ |
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3 |
stc.d CP#, Rb[Ri<<sa], CRs |
*(Rb + (Ri << sa2)) = CP#(CRd+1:CRd); |
# ∈ {0, 1, …, 7} |
Rev1+ |
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4 |
stc.w CP#, Rp[disp], CRs |
*(Rp + (ZE(disp8) << 2)) = CP#(CRd); |
# ∈ {0, 1, …, 7} |
Rev1+ |
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5 |
stc.w CP#, Rp++, CRs |
*(Rp) = CP#(CRd); Rp = Rp+4; |
# ∈ {0, 1, …, 7} |
Rev1+ |
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6 |
stc.w CP#, Rb[Ri<<sa], CRs |
*(Rb + (Ri << sa2)) = CP#(CRd); |
# ∈ {0, 1, …, 7} |
Rev1+ |
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Stores the source register value to the location specified by the addressing mode.
Q: |
Not affected |
V: |
Not affected |
N: |
Not affected |
Z: |
Not affected |
C: |
Not affected |
stc.d CP2, R2[0], CR0